Figure 12-25 shows a simple operational amplifier that we can use as an example to identify and analyze the important functional components discussed in the previous section. 01 and 02 form the input differential stage. The signal inputs are shown grounded because we will presently perform a de analysis of the entire amplifier, and we wish to verify that the output is zero V under those conditions. The 50-0 resistors in the emitters of 01 and 02 serve to increase the amplifier’s input impedance and to make the stage less sensitive to variations in r., as discussed in Section 12-4. 03 and 04 form an unbalanced differential stage that provides additional voltage gain. Note that its inputs are driven by the outputs of the first differential stage and that it has a single-ended output. 05 performs the level-shifting function, as we shall see. 06 is an emitter follower whose output is the output of the operational amplifier. 0/ and OK are constant-current sources that bias the two differential

A simple operational amplifier incoi porating differential, gain. and level-shifting stages. All voltages shown are de levels with respect to ground. stage, Note that these sources share a common voltage divider across the transistor bases.
The de voltages (with respect to ground) and the de currents in the ampl.Iier arc labeled in the [igurc. We begin our de analysis by determining the bias current supplied by QJ to ‘the input differential stage. The voltage divider across  base of QJ sets the base voltage.

Assuming matched conditions, this current divides equally between Q, and 0,. and. since In = In “‘”h, = lr: = (0.4 mA)/2 = 0.2 mA, the collector voltages at 0, and Qz are Vet = Ve2 = Vcc – IcRc = 15 – (0.2 mA)(25 kO) = \0 V. Since the bases of Q, and Q2 are grounded, their emitters are at approximately 0 – 0.7 = -0.7 V, and the small drop across each 50-0 resistor [(50 0) X (0.2 ntA) = 0.01 V] sets the collector of Q7 at about the same voltage (-0.71 V).
We can now analyze the bias of the second differential stage. Since VHX = VH7 = -\0.2 V, the emitter of QM is at l’f.’IC = V/JII. – 0.7 = -10.9 V.

The 1.8 mA divides equally between O~and 04, so the collector voltage of 04 is VC4= Vcc – IcRc = 15 – (0.9 mA)(3.3 0) = 12 V. Since the bases of OJ and 04 are direct-coupled to the collectors of QI and 02, the base voltages are VHJ = VS4 = \0 V. The emitter voltages are Vt.”3= VE• = H>- 0.7 = 9.3 V. The base of the level-shifting PNP transistor, Os. is direct-coupled to 04, so V85 = 12V. Therefore. 05 has emitter voltage VES = Vas + 0.7 = 12.7V. (Remember that the emitter of a PNP transistor is 0.7 V more positive than its base.) The emitter  current in Q5

Since lcs “” JES, the collector of Os is at Ves = (h’5)(10.47 kO) – Vo, = (1.5 mA)(10.47 kO) – 15 = +0.7 V. Note that Os accomplishes level shifting because its collector can go both positive and negative. (The collector-to-base junction of 05 remains reverse biased when the collector is negative and when it is up to 12 V positive.) The collector of 04, on the other hand, must always be more positive than its base voltage (+ 10 V).
Since the base of the output transistor, Q6, is at 0.7 V, its emitter is at:’0 V, and we see that the amplifier output is 0 V. The bias current in Oh is (0 – Vn:)!5 kO = (15 V)/(5 kO) = 3 mA. This concludes our dctanalysis. In a practical operational amplifier, some of the functions we have described are accomplished in a more elaborate manner. For example, the constant-current bias sources are implemented with current mirrors and/or Widlar ‘sources, and active loads arc used instead of collector resistors. These variations were described in Section 12-4, and, in any case, the functional principle of the more elaborate . designs are the same as those governing our simple example. The next example shows how to perform a small-signal analysis of the amplifier

Assume that the transistors in Figure 12-25 arc matched and that all have f3 = 100. Neglecting the collector output resistance of each transistor (assuming it to be 00), find
1. the voltage gain V”/(Vil – va);
2. the differential input resistance of the amplifier; and
3. the output resistance of the amplifier


t. The load driven hy the input differential stage is the differential input resistance 1′”,14 or the second stage. Since ILl = If..! = O.l) mA.

The ac load resistance driven by the second stage is the input resistance looking into the base of Q,: 1′” = (3(r” + RI.5)’ Since 1/;. = 1.5 0.0261 (15 mA) = 17.3 n. Thus. I’i’ = 100f( 17.3 H) + (I.5J kU) 1= 154.73 k!1. The second stage is operated single-ended and its gain is

The resistance in the collector circuit of the level-shifting stage (0,) is (10.47 kn) II rih, where r,h is the input resistance Iooking into the base of OJ,. Since !,h = 3 rn A,  0.026/(3 1111\) = X.7 .n and r.« = f3{rd, + Ru.) = iOO[(X.70) + (5 kn)] ::>; SOO kn. Thus. the g.ain of Os.

(This would not be considered a very large voltage gain for modern operational amplificrs.)

2. The differential resistance looking into the first stage is r,,/12 = f3(r;., + r •.2 + 2R/.) = 100(130 + 130 l- 1(0) = 36 kn.
3. Recall that the output resistance of an emitter-follower stage


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