Figure 4-39 shows common-collector bias circuits for NPN and PNP transistors. Once again, the load line for Figure 4-39(a) can be derived by writing Kirchhoff’s voltage law around the output loop

Recall that the output characteristics for the CC configuration are, for all practical purposes. the same as those for the CE configuration. Therefore. we will not present another example showing the load line plotted on output characteristics . . As in the previous configurations, we must find III in order to determine the bias “oint. Figure 4-40 shows a circuit that is equivalent to the loop in Figure 4-39(a) that starts at V(,(” passes through R”, through the base-emitter junction.

**CB Bias Design**

Although a bias circuit for the common-base configuration can be designed using a single de power supply, we will consider only the, .o-source design (Figure 4-27) at this point in our discussion. In the usual design scenario, the supply voltages Va and Vcc are fixed, and we must choose values for Rf; and Rc to obtain a specified bias current I and bias voltage l’ en- Letting Ie = IE, equations 4-21 are easily solved for R, .. .d Rc in terms of l t: and V

In practical discrete-circuit designs, it is often necessary to use standard-valued resistors. The standard values closest to the values calculated from equations 4-29 are used, and the circuit is analyzed to determine the resulting values of hand VeB• If variation from the desired bias values is a critical consideration in a particular application, it may be necessary to use precision resistors or to calculate the total possible variation that could arise from using resistors that have a specified tolerance.The next example demonstrates these ideas.

**Example 4-13**

A common-base bias circuit is to be designed for an NPN silicon transistor to be- used in a system having de power supplies + 15 V and -5 V. The bias point is to be h= 1.5 mA and VCR == 7.5 V

1. Design the circuit, using standard-valued resistors with 5% tolerance.

2. What are the actual bias values if the resistors selected have their nominal values?

3. What are the possible ranges of I,: and VCII, -taking the resistor tolerances into consideralion?

**Solution**

1. Prom equations 4 -29

Appendix B contains a table of the standard values of resistors having 5% and 10% tolerances. The standard 5% resistors with values closest to those calculated for R£ and R; are R, = 3 kD. and Rc = 5.1 kf].

2.From equations 4-21

We see that considerable variation from the desired bias point is possible when using standard-valued resistors.

**CE Bias Design**

In Chapter 5 we discuss the design of a voltage-divider hias circuit that has certain properties superior to the design shown in Figure 4-32. However, when simplicity and minimization of the number of components are the primary considerations, the circuit or Figure 4-32 is used. Assuming the supply voltage Ve(, is fixed. we solve equations 4-24 for R/J and R(, in terms of the desired bias values for /(‘ and V

The practical difficulty with this design is that the bias point depends heavily on .tbc value of {3,which varies considerably with temperature. Also, there is typically a wide variation in the value of {3among transistors of the same type. Consequently, this design is not recommended for applications where wide temperature variations may occur or for volume production (where different transistors arc used). The next example demonstrates this point.

**Example 4-14**

An NPN silicon transistor having a norninal S of [I”li, to he used in u CE conllguration with V(‘(· == 12 V. The bias point is to he /(‘ = 2 mA and

I. Design the circuit, using standard-valued 51}hresistors.

2. Find the range of possible bias values if the {3of the transistor can change to any value between 50 and 150 (a typical range). Assume that the 5% resistors have their nominal values

**Solution**

1. From equations 4-30,

In most practical applications, the possible variation of Va from 2.92 V to R.l)7 V would be intolerable.

**CC Bias Design**

To obtain resistor values for the common-collector bias circuit (Figure 4·-37), we solve equations 4.2X for RI. and R/I in terms of the desired bias values I, and V

**Example 4-15**

An NPN silicon transistor having f3 = 100 is to be used in a CC configuration with 24 V. The desired bias point is Vu = l(l V and”, c

I. Design the bias circuit using standard-valued SI!i resistors.

2. rind the actual bias point when the standard resistors are used. assuming they have their nominal values.

**Solution**

1. From equations 4-31,

From Appendix B, the standard 5% resistors having values closest to those calculated are R” ‘= 2 kH and Ru = 390 kH.

2. from equations 4-2R,