Epitaxial and Buried Layers Electronics Help

In the fabrication of most monolithic integrated circuits. the processes we have described for producing tiny P and N regions in a silicon crystal arc not applied directly to the wafer but rather to a thin crystal layer grown on the surface of the wafer. The original (wafer) crystal is called the substrate for the circuit, and the thin layer is called an epithelial layer. Typically, the substrate is P-type silicon and the epithelial layer is N-type silicon. The substrate (wafer crystal) serves as the seed crystal for the growth of the epithelial layer. The procedure for growing this new layer, called epitaph, is a special case of chemical vapor deposition (CVD). in which gaseous chemicals are used to deposit a layer of solid material on.a crystal. Besides an epithelial layer, CVD can be used to deposit Si and poly crystalline silicon. Epitaph is a special case because tile solid deposited is a uniformly oriented crystal that aligns itself with the orientation of the crystal in the substrate. It occurs when the gas used is  and the temperature is greater than. In integrated circuits. the tantalization pattern required to interconnect devices is deposited on the surface of the chip. For an NPN transistor. which is the most common type fabricated in ICs, the N-type epithelial layer serves as the collector. To reduce the collector resistance in the path between the epithelial collector region and the surface. a region of heavily duped (highly conductive) N’ material is created beneath the epithelial layer, and another from the epithelial layer to the surface, where contact is made to the collector. Because of its location. the N” region lying beneath the epithelial layer is called a buried layer. It is diffused into the substrate wafer e ~t>ether epithelial layer is created. In a later step. an N’ region is diffused into the epithelial layer from thc wafer surface to provide the low-resistance collector contacting path. Figure 6-17 summarizes the steps involved in the fabrication of a single NPN transistor in an epithelial layer with a buried N+ layer. The several oxidation and the masking steps required to perform all the diffusion are not shown explicitly in the figure. Diodes are fabricated in integrated circuits in exactly the same \’Jay as transistors. In fact, a diode is often formed by shorting the collector of a transistor to its base. Figure 6-18 illustrates this use.Resistors In a bipolar integrated circuit, each resistor is formed by diffusing a certain quantity  of P- or N-type material into the epithelial layer on the surface of an electrically isolated “island:’ The total resistance of each diffused resistor is determined by the geometry of the region in which it is formed (length, width, and depth) and the conductivity of the diffused material, the degree of doping.

21

A summary of the steps required to [ a planar N I)N transistor in all Note that the buried N’ layer is created before the layer. resistors have been formed, they are -interconnected with other components, as required, by . It is desirable to have all resistor occur at the same time that the for transistor base or emitter re$ions occur, thus avoiding the need for additional masking and steps. Therefore, the design of a resistor amounts to the specification of its geometry rather than the doping level of the diffused material, as the latter will be the same for all devices undergoing a diffusion step. III integrated circuits, a diode is of tell [ by shorting the collector of transistor 10 .

Figure 6-19 shows a bar of diffused material forming a P-type resistor in an layer and identifies the dimensions that determine its total resistance. Recall (Chapter 2) that the resistance R between the ends of the bar shown in Figure 6- ) is R = e!.. ohms A where p is the of the material in n .m and J\ is the cross-sectional area. As can be seen in the figure, A = so R =ohms (6-36) Consider now a bar of mercurial having fixed thickness I and having I = W, i.c., a
square section. For this halo the quantities I and W in equation 6-36 cancel, and we obtain the special quantity R” called the sheet resistance (also called the sheet  ohms/square I Note that R, has the same value for square section of a diffused layer having constant thickness and uniform festivity. Note also that the units of p and t must be consistent in order for R, to have the proper units. For example, if p is in ohm’ meters, then t must be in meters. The: thickness of an integrated-circuit layer is often expressed in microns. where 1 micron = 1 p,m= -n m. It is the sheet resistance of a diffused layer that is of primary interest to an integrated-circuit
designer. Its value, which can be measured using special techniques, is typically in the range from 2 to 10 O/ for emitter and 100 to 200 O/square for base .

Posted on November 18, 2015 in Bias Design in Discrete and Integrated Circuits

Share the Story

Back to Top
Share This