Like bipolar transistors, field-effect transistors can be connected as ac amplifiers to achieve voltage, power, and/or current gain. For example, in the most useful JFET configuration, the common-source amplifier, a small variation in the gate-to source (input) voltage creates a large variation in the drain-to-source (output) voltage, when the device is operated in its pinch-off region. We will develop equations that allow us to compute the magnitude of the gain in this and other FET configurations when the input variation is small compared to its total possible range, i.e., under small-signal conditions, We begin with a discussion of the FET small signal parameters that directly affect gain magnitude computations.

Smail-Signal JFET Parameters

Recall that trans conductance is defined to be the ratio of a small-signal output current (i,,) to the small-signal input voltage (ViI) that produced it. The trans conductance of a JFET is defined in the context of a common-source configuration, for which the output current is id and the input voltage is vg where LlID is the change in drain current caused by LlVGS, the change in gate-to source voltage. Note that we resume the use of lower case letters in keeping with the usual convention for representing small-signal quantities. The value of gin can be found graphically using a JFET transfer characteristic, since the latter is a plot  of drain current versus gate-to-source voltage. Trans conductance is thus the slope
of the transfer characteristic at the operating point, as illustrated in Figure 8-1. As shown in the figure, gill is calculated graphically by drawing a line tangent to the characteristic at the quiescent point and then measuring its slope. Note that trans conductance increases with increasing values of 10, that is, at Q-points lying farther up the curve toward IMS, because the curve becomes steeper in that direction. Since the current in a JFET amplifier varies above and below the Q-point, and since the trans conductance changes at every point along the characteristic, small signal analysis is valid only if AID is small enough to make the change in negligible. It can be shown that under small-signal conditions the value of g”, is approximately given by where VGS is the quiescent value of the gate-to-source voltage. The use of absolute values in equation 8-2 makes it valid for both N-channel and P-channel devices. Equation 8-2 can be used in conjunction with the equation for the transfer characteristic (Exercise 8-4) to express in terms of the quiescent value of the drain current:Equation 8-3 clearly shows that the value of gm increases with increasing 10• It is a maximum when 10 = loss, for which it is given the special symbol g”,o. From equation 8-3, with loss, we have Although a large value of g is desirable? and results in a large voltage gain (as we shall presently see), we would never bias a JFET at l» = loss for small-signal operation. Obviously, no signal variation above that Q-point could occur if that were the case both (1) graphically and (2) algebraically, the value of its trans conductance when 10 = 4 mA. Also determine the value of g”,o. Solution 1. As shown in Figure 8-2, a line is drawn tangent to the transfer characteristic at the point where ID = 4 mA. Using values obtained from the figure, the slope of This parameter is also called the drain resistance rd. or r,/,. It can he determined graphically from a set of drain characteristics (Figure 7-6), hut the lines are so nearly horizontal in the pinch-off region that it is difficult to obtain accurate values. In any case, the value is generally so large that it has little effect on the computation of voltage gain in practical circuits. Values of rd range from about 50 to several hundred in the pinch-off region. Figure 8-3 shows the small-signal equivalent circuit of the common-source JFET, incorporating the parameters we have discussed. The current source having value gll/v~, is a voltage-controlled current source, since the current it produces depends on the (input) vol age s» It is apparent in the figure that id = g.” , in agreement with the definition of gm (equation 8-1): Notice that there is an open circuit shown between the gate and source terminals. Since the gate-to-source junction is reverse biased in normal operation, the extremely large resistance between those terminals can be assumed to be infinite in most practical situations.

Posted on November 18, 2015 in FET CIRCUITS AND APPLICATIONS

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