General Algebraic Solution We can obtain general algebraic expressions for the bias points in POMS and NMOS circuits hy solving equation 7-llJ simultaneously with quondam 7-21 or 7-22 for If). ! results are The transfer characteristic of the FET in Figure 7-42 is given in Figure· 7-43 (fj = ll.5 X 10 -J ). Determine values of VC;h II), and Vf)S at the bias point (1) graphically and (2) algebraically.This equation intersects the Iwaxis at II.4X mA and the V/;s·axis at Va = ).74 V. It is shown plotted with the transfer characteristic in Figure 7-43. The two plots intersect at the quiescent point, where the values of II> and Vc;s are approximately 1/1 = 2.0 mA and Vc;s = 4.6 V. The corresponding quiescent value or V/JS is found from equation 7-23: VI>S = 18 – (2.0 mA)[(2.2 In order for this analysis to be valid, the Q-point must be in the active region; that is, we must have VJ)s> V(;5 – V,.. In our example. we have V/Js = 12.60 V and ViiS – VI = 2.0 Y, so we know the results arc valid. The validity criterion can be expressed for both NMOS and PMOS FETs as IVml > IViiS – v.]. 2. We have already found V(; = 5.74 Y. Using R.~ = 500 n. Ro = 2.2 kIl, Von = IX Y, V,.:::; 2 Y, and f3 == 0.5 x 10-\ we have, with reference to equations 7-26 Substituting these values into the equation for 10, we find If) :::; 1.927 mA. Then. Vo~ = 18 V – (1.927 mA)(2.2 kO + 500 0) :::;12.8 V and Vr.s :::;5.74 V – (1.927 mA)(5oo 0) = 4.78 V. These results agree well with those obtained graphically in part I.Solution. The SPICE circuit and input data file a c shown in Figure 7-M(a). Note that the parameter VI’ is entered in the .MODEL statement as VTO = 2 and that f3 is entered as J(;’ -ee 0.5E-3 (see Section A-12). All other parameter values arc allowed to default. Tht.> results of the ‘analysis are shown in Figure 7-44(h). We see that 1/1 = I(VIDS) = 1.l)26 mA, Vo.\’ = V(3,2) = 12.R V and VI;~ = V(I, 2) = 4.776 V, in good agreement with the previous example.

**Feedback Bias**

Figure 7-45 shows another way to bias an FET. The resistor U(;. which is usually very large, is connected between drain and gate and carries no current because of the very large (essentially infinite) resistance at the gale. Since there is no voltage drop across Re, Vcs = V[)S. We can therefore be sure t1″H V’s> VI,S – Vr. which ensures that the device is biased in the active region. N, provides

negative feedback to stabilize the bias point. For example, if 1(, II\cr Ior any reason, then there is a greater drop across Ro and VOl decreases. Hut. since VI;’ = V/>s. this means that VI;S also decreases. The decrease in. thus counteracting the original increase in Ill. From Figure 7-45. it is clear that

**General Algebraic Solution-Feedback Bias**

By solving equations 7-27 and 7-28 simultaneously for /0, we can obtain the general algebraic solution for the bias point in a MOSFET circuit employing feedback bias. (The derivation is Exercise 7-40.) Equations 7-29 show the results, valid for both lid PMOS circuits,