Figures 7-25 and 7-26 show typical data sheets for a series of N-channel JFETs: the 2ND, I , and 2ND. Note in particular the specification for the range of values of loss for each device, as shown in Figure 7-25. We see, for example, that loss for the can range from 5 mA to 15 mA. The pinch-off voltage (designated V(;s(om) for the is seen to have a maximum value of -8 V. Devices having small values of loss will have smaller values of VC;S( ‘ Another important static characteristic shown in Figure 7-25 is lass. the gate reverse current,Figure 7-26 Typical manufacturer’s performance curves for the channel .TFETs of Figure 7-23 (Cour- IC,I)’ of Silicon ix, Inc.) which is the gate current when the gate-source junction is reverse biased, the normal mode of operation. This current provides a measure of the de input resistance of the device, from gate to source. We see that the maximum specified value for the magnitude of fuss is 0.1 nA when Ves = -15 V and Vvs = O. Thus, the minimum gate-to-source resistance tinder those conditions is R = (15 V)/(O.l X 10-9 A) = 150 X 109 n. Figure 7-26 shows typical “performance curves” for the series of JFETs. The curves are also applicable to a number of similar JFETs produced by the manufacturer and show how wide a range of characteristics ·is possible. Note that two sets of output characteristics (drain characteristics) are shown, one ‘presenting a device having a small/lJss 1.4 mA) and another having a larger I nss (“‘” 4.2 mA). Two sets of transfer characteristics arc also shown in the figure. These show the range that can he expected in the characteristic among devices of the same type. as well as variations due to temperature. The transfer characteristic in the center of the figure is applicable to the JFET. At 25°C, we see that any given could have a value VII between about -2 V and -5 V. An interesting temperature phenomenon of JFETs is revealed by these characteristics. Note that the (maximum) value of loss at 25°C is less than the value at -40°C, but greater than the value at 85°C. Although it is difficult to see in the figure. this result is accounted for by the fact that the three temperature curves intersect and cross through each other near the VII end of the characteristics. For the , this point can be seen to occur at about VGS = -4.5 V. Thus, the characteristics have zero temperature coefficient when the bias point is set at (about} -4.5 V. For every JFET, there is a value of V(;s near VII that results in a zero temperature coefficient.

Posted on November 18, 2015 in FIELD-EFFECT TRANSISTORS

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