The MOSFET as a Resistor In Chapter 6 we discussed the fact that it is easier and mere efficient to  a transistor than it is to construct a resistor in an integrated circuit. This is  true in enhancement MOSFET circuits because of the simple structure of  devices. For this reason, MOSFETs are connected so that they serve the roles of
resistors in integrated circuits. One wayan enhancement be  as a resistor is shown in Figure 8-37.A plot VeiS = V/lS on a set of NMOS drain characteristics, showing the nonlinear nature of the enhancement MOSPET connected as a resistor (Figure 8-37)Note in 8-37 that the drain is connected directly to the gate. It is apparent
is case that Vos = V(;s. It is therefore true that !V/}sl > !VGS – vrl, so the device is always in its active region. Figure 8-38 shows a plot of the curve V/}s = Vr;s on a typical set of NMOS drain characteristics and it can be seen that the curve lies entirely in the active region. Notice that the curve is nonlinear, meaning that the MOSFET acts like a nonlinear resistor. Since VGS = Vvs = the voltage V across this nonlinear resistor, its J- V characteristic is 8-45 and 8-46 show that the resistance depends on the value of . which in turn depends on the aspect ratio (length/width) of the channel. Large values of resistance (small values 01′,8) are achieve by making the channel long and narrow.

The MOSFET Inverter with MOSFET Load

Figure 8-39 shows an circuit having an  FET used as a load resistor. The theory of operation of this inverter is similar to that of the BJT inverter we studied in Chapter 4, in that the MOSFET (01) acts like a voltage-controlled switch. The principal difference is that the BJT inverter we studied before had a fixed, linear load resistor, while the NMOS inverter has another MOSFET acting as a nonlinear resistor whose value depends on whether 01 is ON or OFF. Note that the substrate of 02 is shown grounded, but it is not connected to the source of 02. If it were connected to the source, then the drain of 01 would be grounded, All circuit using an ( ) as a load resistor. QJ acts as a voltage- controlled switch that is opened or closed by arrangement has the effect of making the threshold voltages for QJ and Q2 slightly different, but we will neglect this difference in our discussion. Figure 8-40(b) shows a typical set NM OS drain characteristics for transistor QJ in Figure 8-40(a). Superimposed on these characteristics is the nonlinear load line that results when transistor is used as the load resistor. In the discussion that follows, we will use the subscripts 1 and 2 to designate voltages and currents in and , respectively. Thus, for example, is the drain-to-source voltage of . which is the output voltage of the . When is off, 0 and is a large voltage. These are the conditions at point B in Figure 8-40(b). When QJ is conducting (identified in the figure as V(JN is small, and is in its resistance region. These conditions correspond to point A in Figure As shown in Figure 8-40, the output voltage switches between (low) and /l – VT (high). The input to the is assumed to alternate between these same two levels, since the output of another, similar circuit is normally the input to an . When the input is at YON, which is a small voltage less than Vr, Q, does not conduct and the output is high (VDD – Vr, at point B). When the input is high, = Voo – Vr, so Q, conducts and the output is low ( ‘ at point A). The aspect ratios of 0, and O2 in the circuit are designed so that the resistance of Q2 is greater, typically ten times greater, than the resistance of Q,. This means that is typically one-tenth of (3,. To determine the value of VaN we must analyze the circuit for the case where VGSI = f – Vr See Figure 8-41, and notice that = V(;.Q. By writing Kirchhoff’s voltage law from to ground, we find = +  o The in Figure 8-40(a) has the following parameters: 11 2 V, i31 = 0.25 X 10-3, = 0.025 X 10-3, and VDD = 10 V. Find the high and low output voltages. Solution. The high output voltage = 0.49 V is less than the threshold voltage, Vr = 2 V, we can be sure that the MOSFET will remain off when its input is the voltage YON produced by another, identical We have used devices in all the figures and examples we have presented so far for our discussion of MOSFET inverters. The theory is’ wholly applicable to PMOS devices. Note, however, t hat a “high” level in H PMOS inverter is a voltage near 0, while a “low” level is a large negative voltage. near – VVD. In modern practice, NMOS devices are more widely used than PMOS devices in integrated circuits because NMOS switching speeds are faster. Neither NMOS .,nor PMOS devices are used to fabricate general-purpose logic circuitry (logic gates that can be accessed externally and connected in various ways to suit various applications), because the switching speeds of both are slow compared to CMOS circuitry, which we will discuss later. NMOS devices are used in dedicated VLSI circuits: those that perform specific functions in a larger system. Examples include computer memories and microprocessors

Posted on November 19, 2015 in FET CIRCUITS AND APPLICATIONS

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