PN junctions in an N-typc crystal Electronics Help

illustrates how the steps we have described so far could be used to create two PN junctions in an N-typc crystal. The final steps in the photo lithographic processing are those required to deposit metal contact surfaces where terminal leads can be attached and. in the case of integrated circuits, any metallic paths needed to interconnect devices. This phase of the procedure is called tantalization. The metal most often used is aluminum (AI) because it adheres well to Si and Si• Gold is sometimes used, but additional steps are then necessary to ensure adhesion. Vaporized aluminum is first deposited over the entire surface of a wafer that has undergone the diffusion processing described earlier. A layer of photo resist is then applied on top of the aluminum and exposed through a mask that defines the tantalization pattern. As before, the
unexposed PR material is removed and the aluminum is etched away from all regions where if is not covered by exposed PR. The process we have described could be used to obtain hundreds of discrete PN diodes from a single wafer. The Sill layer is generally left intact and the wafer is scribes. or cut, with a laser to separate the individual devices. The steps required for the fabrication of a more complex device, such as a transistor. are like those for a single PN junction, hut involve repeated oxidation’s and diffusion to create alternating layers of P and N regions. The crystal itself may he used as one of those.

layers (for example. as the N-type collector in an NPN transistor). A transistor whose base, emitter, and collector regions lie in parallel planes, one on lop of be other, is said to be a planar transistor. Most integrated-circuit transistors are of this type. Figure 6-16 summarizes the steps involved in the fabrication of a planar NPN
transistor. Note that three oxidation steps, two diffusion steps, and one materialization step are required. Four masks are required . . All the steps we have described for fabricating PN devices are applicable to batch production of integrated-circuit chips, with a few variations and some add.

national steps we will describe presently. Of course, the diffusion and materialization masks necessary to produce a large number of complex devices must be very intricate and very precise. In fact, the preparation of these masks is one of the most expensive and time-consuming steps in the process. In many cases, the required precision can be obtained only through the use of computer-aided design techniques. Newer techniques employ a computer-controlled electron beam that “writes” a pattern directly on the wafer surface, thus eliminating the need for masking altogether. Much liner line widths can be achieved this way. Similar computer techniques are now also being employed to create very fine masks used in conventional lithographically procedures. As an alternative to impurity diffusion, a modern method called iii/ implantation is also being used to create P and N regions in a crystal. In this method. impurity ions are given high energies by an acceleration tube and literally driven through the surface of the wafer and embedded in the crystal. Since ion implantation is blocked by photo-resist (or metal), the lithographically methods we have already described can be used to control the pattern where P and N regions are formed. One advantage of ion implantation is that it can be performed at room temperature. The average depth to which the ions penetrate the crystal, called the projected range, can be closely controlled by adjusting the energy imparted to the ions in the accelerator .ubc. This degree of control is a second advantage of ion implantation:
the doping level and depth of doping can be set quite accurately. Very thin regions 01 P or N material can be created very precisely, as is necessary in some C designs. Ion implantation is used when these factors are critical to the operation of a circuit. One disadvantage of ion implantation ill that the high-energy ions rupture the crystal structure to a certain extent. The damage can be repaired by heating. a process called annealing.

Posted on November 18, 2015 in Bias Design in Discrete and Integrated Circuits

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