Another way to view the voltage gain equation is to consider how gain varies as a function of ac load resistance ri- In order to focus on that aspect alone, let us assume that a CE amplifier is driven by a source having t:s ~ 0, so equation 5-42 becomes
equations 5-17 and 5-18 that the ac load line intersects the Vn:-axis at Vo = VQ + IQrl. and intersects the Ie-axis at 10 = IIJ + VIJ/rL, where IQ and VQ are the Q-point coordinates. It is therefore clear that the positive-going output voltage cannot exceed the bias voltage by more than IlJr/. volts. This fact is illustrated in Figure 5-35. The output voltage can swing IlJr/. volts above the Q-point and VIJ volts below the Q-point. Thus the maximum output voltage variation is the minimum of the two values V(] and IlJr/.. If the output attempts to exceed VQ by more than lorl. volts, its positive peak will be clipped; if it attempts 10 swing more than VQ volts below V(], its negative peak will be clipped.
Find the maximum peak-to-peak voltage that the source in Figure 5-36 can produce without causing clipping at the amplifier output.
Solving first for the quiescent values, we have
Therefore, the maximum output swing above Vo = 7.34 V is lorl. = (5.11 mA) (R92 D) = 4.56 Y. Since V(! = 7.34 Y, the maximum output variation from the Q-point is the minimum of 4.56 V and 7.34 Y, or 4.56 Y. Thus, the maximum peak-to-peak ac output is (2)(4.56) = 9.12 Y p-p. To determine the source voltage that produces a 9.12- V p-p output, we must find the voltage gain of the stage.
Use SPICE to determine the quiescent point, the voltage gain VI./VS, and the current gain iil!« of the amplifier shown in Figure 5-36. Assume each of the coupling capacitors is 10 IkF and that the signal frequency is 10 kHz. (These values ensure that the reactance of the capacitors is negligible and will have no effect on amplifier gain.) Assume the magnitude of the signal-source is 50 mV
Figure 5-37(a) shows the circuit redrawn for analysis by SPICE and
the input data file. Note that we have inserted a dummy voltage source to measure the current in RL, so that the current gain iL/is can be determined. A .DC analysis is not required, since SPICE automatically provides “operating point information” when performing an .AC analysis of a circuit containing a transistor.
The results of a program run are shown in Figure 5-37(b). We see that the operating (quiescent) point is V”I ,. -7.402 Y and Ie = 5.07 mA. The results of the analysis show that the phase angle of the output, YP(6), is very nearly 180°,
Figure 5–20 in our discussion of graphical amplifier analysis shows that the ac load line shifts with changes in the O-point. It is obvious that shifting the ac load line causes it to have different intercepts on the horizontal and vertical axes. It should therefore be possible to locate the Q-point in such a way that the maximum positive swing equals the maximum negative swing, and thereby attain the maximum possible peak-to-peak output swing. As we can see in Figure 5-35, this condition occurs when
a PSpice format in Figure 5-38(b). Also shown is the PSpice input circuit file. Note that we use the PSpice library to access the model statement for the 2N2222A transistor (see Appendix Section A-17). Also note that the Q-point can be obtained in a PSpice .PRINT statement by requesting outputs IC(Ql) (the de collector current of Q1) and VCE(Q1) (the de collector-to-emitter voltage of Q1).
Execution of the program reveals that IC(Q1) co 1.125 mA and VCE(Q1) = 13.31 V. Since Vcc = l5 V. this quiescent point is close to the cutoff region of the transistor. We might therefore expect positive clipping to occur if the input to the amplifier is sufficiently large (see Figures 5-8(a) and 5-14). Figure 5-38(c) shows a plot produced by the PSpice Probe option (Section A-16). and we see that clipping does indeed occur. The Probe cursors are set at the minimum and maximum values of Vet! Cl = 14.403 V and C2 = 6.6941 V. Thus, positive clipping occurs at Vee = 14.403 V.
Small-Signal CC Amplifier Model
Figure 5-3~(a) shows a common-collector amplifier and Figure 5-39(b) shows the corresponding small-signal equivalent circuit. Note that the collector in Figure 5-39(b) is shown grounded, since Vcc in Figure 5-39(a) is connected directly to the collector and de sources are once again treated as ac short circuits. Some author srefer to the CC transistor as a “grounded collector” configuration, which is correct in the ac sense. A load resistance RL is not included at this time
Since the common-collector input and output currents arc i” and respectively we find the current gain for the transistor in this configuration to be
Thus, while the CC voltage gain is somewhat less than I, the current gain is substantially greater than I, and so, therefore, is the power gain:
Rather than presenting a lengthy derivation for the output resistance of the CC transistor, let us make an intuitive observation, from which we can formulatea general rule for determining output resistance of CC amplifiers. We have nlreud , seen how the relationship i, = (f3 + I)i” leads to the resull that the resistance looking into the base is (f3 + I) times greater than the actual resistance connected through the base to ground (equation 5-54). Conversely, that same relationship
implies that resistance looking into the emitter is (f3 + I) times smaller than the
resistance from the emitter back to the signal source. Now, the output resistance of the CC stage in Figure 5-39, r,,(stage), is the resistance looking into the emitter in parallel with RE• Therefore, applying the foregoing rule, we find
where R’ll is the resistance looking from the base toward the signal source. Figure 5-40 shows how R’ll is defined in the ac equivalent of the base circuit. R’8 is computed by shorting the signal source to ground, so
Equation 5-64 shows thai the output resistance of an emitter follower can be quite small. For example, for the typical values R£ = 1 kO, r, = 25 0, R8 = 100 kil, rs = 500, and (3 = 100, we find
Figure 5-41 shows an emitter follower having a load resistance RI. that is capacitor-coupled to the emitter. Since the total ac resistance connected between emitter and ground is now n. = RI, II RI., the input resistances specified by equations 5-54 and 5-56 become
The overall voltage gain of the emitter-follower stage, taking load and source resistances into account, can be determined as follows
Although the emitter follower by itself has a voltage gain less than 1, it can be used to improve the voltage gain of a larger amplifier system. Because of its large input resistar-ce, it does not “load” the output of another amplifier. In other words, the load presented by an emitter follower to another amplifier does not appreciably reduce the voltage gain of that amplifier. A Iso, because it has a small output’ resistance, the emitter follower can drive a “heavy” load (small resistance) whose presence would otherwise reduce voltage gain. For these reasons, an emitter follower is valuable as an intermediate stage between, an amplifier and a load. When an emitter follower is used this way, it is called a buffer amplifier, or an isolation amplifier, because it effectively isolates another amplifier from the loading effect of R,.. This use is illustrated in the next example.
An amplifier having an output resistance of 1 kO is to drive a 50-0 load, as shown in Figure 5-42(a). Assuming that the amplifier has a voltage gain of A. = 140 (with no load connected), find
1. the voltage gain with the load connected, and
2. the voltage gain when an emitter follower is inserted between the amplifier and the load, as shown in Figure 5-42(b).
1. The voltage gain with the 50-!1 load connected is
The system gain from amplifier to load is then lCJ,n(5)(140) = g4.7. We see that insertion of the emitter follower improved the voltage gain from n.n7 to X4.7. a 117()1/'”increase. It is an exercise at the end of this chapter to verify that very nearly the same result is obtained using approximation 5-70 instead of equation 5-69, ever- though ‘”s is relatively large (I